1. Field of the Invention
The present invention relates to a semiconductor module and a method for making the same.
2. Description of the Related Art
There is a type of semiconductor module called a CSP (Chip Size Package) among the conventional semiconductor modules. A semiconductor module of CSP type is produced by a process in which a semiconductor wafer (semiconductor substrate) with LSIs (circuit elements) and external connection electrodes connected thereto formed on the main face thereof is diced into individual modules. Therefore, a semiconductor module can be fixed onto a wiring substrate in a size practically the same as an LSI chip. This helps realize the miniaturization of a wiring substrate on which the semiconductor module is mounted.
In recent years, following the trend of electronic devices towards miniaturization and higher performance, demand has been ever greater for further miniaturization of semiconductor modules which are used in them. To realize such miniaturization of semiconductor modules, it is of absolute necessity that the pitch of electrodes that allow packaging on wiring substrate be made narrower. A known method of surface-mounting a semiconductor module is flip chip mounting in which solder bumps are formed on external connection electrodes of circuit elements and the solder bumps are soldered to an electrode pad of a wiring substrate. With this method, however, there are restrictive factors for the narrowing of the pitch of external connection electrodes, such as the size of the solder bump itself and the bridge formation at soldering. A way used to overcome these limitations in recent years has been the rearrangement of external connection electrodes by forming a rewiring of the circuit elements. For example, in a known method for such rearrangement, a bump structure formed by half-etching a metal plate is used as an electrode or a via, and external connection electrodes of the circuit elements are connected to the bump structure by mounting the circuit elements on the metal plate through an insulating layer of an epoxy resin or the like.
In a conventional technology, a semiconductor wafer (semiconductor substrate) is formed by stacking a metal sheet, an insulating layer and a circuit element in such a manner that bump structures are embedded in the insulating layer. In this state, because of the low fluidity of the insulating layer, there is little room for the resin pushed out by the bump structures to escape into, especially near the center of the semiconductor wafer. This presents a problem of reduced connection reliability of the rewiring portions because a residual film of resin stays on at an interface between the bump structures and the opposing electrodes of the circuit element.